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Fan-out panel-level packaging (FO-PLP) is a growing segment in heterogeneous integration, gaining importance as a cost-efficient solution for advanced packaging. Panel formats of 310×310 mm² demonstrate technical advantages over wafer substrates while avoiding the process complexities associated with larger panel sizes. In this work, a novel dry film resist (DFR) was patterned using digital exposure lithography for high aspect ratio (high A.R.) Copper pillar (Cu pillar) application. CD uniformity confirmed a deviation within ±4.00%. Patterning of both, round and square via geometries proving straight side wall profiles with a VIA and L/S resolution of 30 μm was demonstrated in 120 μm-thick DFR. Subsequent electroplating and resist stripping enabled the successful fabrication of Cu pillars with A.R. of 1:3 and 1:4, respectively. In addition, newly developed equipment software features effectively addressed the challenges associated with 2.5D and 3D integration, supporting the requirements of next-gen AI and HPC devices.
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Varga et al. (2026) studied this question.
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