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This work presents a truly asynchronous physical Potts node (TAPPN) using floating-body metal–oxide–semiconductor field-effect transistors (FB-MOSFETs) to overcome the scalability and encoding overhead limitations of binary Ising-based probabilistic computing. The TAPPN enables native multistate representation without external random-number generators (RNGs) or complex digital arbitration by the intrinsic stochastic single-transistor latch (STL) effect and a drain-sharing configuration. The stochastic source and the one-hot constraint are realized by three transistors, and the node requires 25 transistors and 220 nW including the readout, compared with 2160 transistors and 52 μW for a self-contained digital node evaluated at the same boundary. Its truly asynchronous operation allows efficient exploration of the problem space in large-scale graph-coloring benchmarks. In simulations of the update rule, the Potts-based system achieves a higher success probability than simulated annealing (SA) and parallel tempering (PT) on graph-coloring benchmarks. For an integrated array assumed to operate at 5 MHz, the architecture is projected to reach a time-to-solution (TTS) of 3.4 μs and an energy-to-solution (ETS) of 504 nJ. This platform establishes a complementary metal–oxide–semiconductor (CMOS)-compatible pathway toward large-scale, multistate combinatorial optimization.
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Cheong et al. (2026) studied this question.
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