Dynamic Reprogramming Voltage Design and Optimization for 3D TLC NAND Flash Memory in Physical-Layer Storage Systems

Three-dimensional (3D) TLC NAND flash memory serves as a core physical-layer storage component in high-performance data storage and transmission systems. Although reprogramming techniques effectively boost storage density and memory endurance, long-term data retention degradation and persistent cell loss severely impair the physical-layer reliability and channel stability. To alleviate these impairments during reprogramming operations, this paper proposes a dynamic write voltage design and optimization scheme for 3D TLC NAND flash memory in physical-layer storage systems. The proposed method extracts physical-layer channel parameters from real flash chips and integrates them into the threshold voltage distribution model to realize adaptive reprogramming voltage adjustment. Based on the measured channel characteristics, a dynamic reprogramming voltage strategy from MLC mode to TLC mode is constructed for reliable data refresh in SSD controllers.