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Metal–oxide–semiconductor (MOS)-only memristor emulators offer simple circuit structures, but limited input-to-state coupling can weaken their high-frequency state response, motivating approaches that improve high-frequency performance while preserving circuit simplicity. To this end, a compact MOS-only memristor emulator is proposed using one n-channel and one p-channel MOS field-effect transistor (MOSFET). This two-MOSFET memristor emulator (TMME) uses intrinsic transistor capacitances for state storage without explicit capacitors, resistors, or an auxiliary direct-current (DC) supply. A three-MOSFET memristor emulator (TRMME) is constructed by adding a coupling capacitor, realized using the intrinsic capacitance of a third MOSFET, to the TMME. The added coupling enhances the internal-state voltage swing and high-frequency terminal response while retaining the same two core transistors. Simulations use Taiwan Semiconductor Manufacturing Company (TSMC; Hsinchu, Taiwan) 5-nm (N5) input/output (I/O) device models. Under a ±1.2-V sinusoidal input, the TMME retains post-layout hysteresis at a 300-MHz benchmark, whereas the TRMME exhibits terminal hysteresis at 9 GHz before and after parasitic extraction. The declared cell areas are 6.480 and 8.530 μm2, respectively. Reduced charge-balance models and transistor-level simulations explain how internal-state evolution governs history-dependent conduction and how additional coupling modifies the response. The operating principles of both structures are further verified using discrete devices.
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Zhou et al. (2026) studied this question.
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