Research reveals effective design of frequency multipliers in CMOS technology, suggesting improvement in signal source efficiency.
This paper proposes a compact inductor design for LC-tank injection-locked frequency multipliers (ILFMs) fabricated using a 0.18 μm CMOS process. The ILFMs use an 8-shaped inductor with two lobes, suppressing the magnetic field generation. Its contents cover one ×2, one ×3, and one ×6 ILFM. The first ×2 ILFM circuit uses the orthogonal transformer consisting of an 8-shaped inductor and a non-twisted inductor. The total area is 1.137 × 0.797 mm2. The input locking range is from the incident frequency of 1.6 to 3.0 GHz to provide a signal source from 3.2 GHz to 6 GHz. The second ×3 ILFM uses the orthogonal transformer and occupies an area of 1.29 × 0.76 mm2. The output locking range is from 9 GHz to 19.8 GHz. This third ×6 ILFM uses a trifilar consisting of two 8-shaped inductors in perpendicular layout and a non-twisted inductor. The ×6 ILFMs show interference noise suppression via a core two-turn 8-shaped inductor and save die area. The die area is 0.843 × 0.981 mm2. At VDD = 1.3 V and an input power of 0 dBm, the output locking range is from 5.16 GHz to 5.388 GHz. In all the investigated ILFMs, no varactors are added to the LC resonator for a wide-band locking range design. The phase noises of the input signal and the output signal of the ILFM are in agreement with the theoretical value.
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Jang et al. (2025) studied this question.
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