Comparison using non-contact QUAD technique reveals defects in SiC epi correlating with device performance.
In this work we present the results of a comparison between the non-contact corona-based QUAD (Quality, Uniformity and Defects) technique for inline mapping of electrically active defects in SiC epi and final wafer level electrical device data on merged PiN Schottky diodes. A new defect analysis method for the QUAD mapping is introduced that involves the creation of a die yield bin map using the in-die values of depletion voltage that facilitates the comparison to the wafer level final electrical device data. Excellent correlation of the QUAD wafer bin map results to the final wafer level electrical device data was observed, illustrating that QUAD mapping of defects in SiC epi can provide a powerful and convenient inline complement to UVPL measurements for determining which defects are electrically active and will impact device performance.
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Faisal et al. (2025) studied this question.
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