Demonstrates p-type semiconductor performance in flexible electronics, suggesting advancements for low-power applications.
Abstract The demand for high-performance thin-film semiconductors processable at low temperatures is rapidly increasing for flexible electronics and monolithic three-dimensional (M3D) integration. While strong n-type candidates exist, p-type counterparts lag significantly in performance and reliability, hindering thin-film CMOS development for low-power electronics. Here, we present a high-performance Te/TeO₂ blended p-type semiconductor fabricated through simple co-sputtering at room temperature. This approach overcomes conventional Te-based TFT limitations including poor electrical stability and positively shifted threshold voltage (Vth). By implementing a protective layer and adopting double-gate architecture, we achieved field-effect mobility of 31.2 cm²V⁻¹s⁻¹ and on/off ratio of ~10⁵ while maintaining near-zero Vth. We integrated this p-type TFT with oxide TFTs on transparent, colorless polyimide substrates, realizing see-through, flexible thin-film CMOS circuits. The fabricated 11-stage ring oscillator and NAND/NOR logic gates exhibited stable operation after bending to 30 mm radius. Furthermore, successful 3D integration with oxide TFTs was achieved without performance degradation.
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Oh et al. (2025) studied this question.
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