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We present a high‐speed burst‐mode optical receiver operating at 25‐Gb/s with the shortest reconfiguration time of 4.52‐ns reported up to date. The receiver consists of a burst‐mode trans‐impedance amplifier (TIA) with 1/8‐rate clock‐assisted DC offset cancellation loop as well as automatic gain control loop, and a burst‐mode clock‐data recovery (CDR) with two‐stage injection‐locking architecture. Both designed and fabricated in a 28‐nm CMOS process, the TIA + CDR optical receiver consumes 101‐mW from a 0.9‐V supply. With a continuous‐time linear equalizer, series inductive peaking and shunt inductive peaking, the 3‐dB bandwidth of Z T(O‐E) of TIA is 20 GHz with 14‐dB gain dynamic range (45–59 dB). The sensitivity of the burst‐mode receiver is −10.1 dBm at BER = 1E‐12.
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Wang et al. (2024) studied this question.
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