Structural level Implementation of Different Symmetrical Multilevel Inverter for Power Quality (PQ) Applications

Abstract An inverter is a solution for power back-up which provides services when normal power is cut off. One of the major concerns in the present-day scenario towards power quality applications is harmonics which creates a lot of problem in designing medium and high-power applications because of its capability in compensation of reactive power. Presently reducing the harmonics with better switching pattern is the need of the hour. The conventional method of inverters focuses on two-level topologies with complications primarily based on THD and switching losses compared to Multilevel inverter. Multi-level inverters are rapidly moving towards future dominance in the field of inverter technology because of its surpassing performance towards newer configuration and topological techniques. Its presence has created an opportunity to propose new techniques to reduce switching losses, THD level and switching circuit tremendously. This proposed paper focuses on structured topology for N-level symmetrical multilevel inverter (NL-SMLI) and also presents the comparative analysis of different PWM techniques such as sinusoidal PWM, third- harmonic PWM, random PWM. Modified Sinusoidal Reference Pulse Width Modulation (MSR-PWM) techniques have been introduced to Hybrid multi-level inverter with new topology to reduce the THD level with the minimum number of switches possible.