Phase inverter design using substrate‐integrated coaxial line with wideband performance

This research introduces an innovative phase inverter (PI) design using a substrate‐integrated coaxial line (SICL). The proposed SICL PI is achieved by bisecting the SICL with two I‐shape slots embedded on the top and bottom broad‐side walls of the SICL. The central signal strip is also bisected, and the divided strips are diverted to the top/bottom walls on the other side of the slots through one or two via‐holes. Thus, phase inversion is obtained by swapping the potentials of the central strip and the top/bottom walls. A transition between the feeding SMA and the SICL is also developed to facilitate measurements. Experimental results demonstrate that the proposed SICL PI exhibits a fractional bandwidth (FBW) of 2.74–4.66 GHz (51.8%) under the criteria of return losses greater than 10 dB, insertion losses less than 0.5 dB, and phase deviation within ±15°.