Underfill Selection Guideline for Fan-Out Heterogeneous Integration Package

This study investigated the mechanical properties and stress intensities of chip modules. We prepared a test vehicle comprising a 72.5 mm × 70 mm package bonded with a 45 mm × 30 mm heterogeneous integration fan-out multichip module (HI-FOMCM). The chip module consisted of one application-specific integrated circuit (ASIC) and two high-bandwidth memory (HBM) interfaces. ANSYS three-dimensional finite element (3D-FEM) analysis was used to simulate the effects of underfill on the HBM die corner and bending stress of the chip module. The results revealed that the glass transition temperature (Tg) and coefficient of thermal expansion (CTE) exerted notable effects on the HBM chip bending stress from warpage. Reduction of relevant modulus effectively reduced bending stress in the HBM die corner. In addition, analysis of stress-strain curves revealed that underfills with large areas under the curve enabled the resulting chip module to bear greater stress, indicating such chip module can increase the reliability and lifespan of products. Overall, an underfill was successfully applied to chip modules, which then passed various reliability tests.