A 2.319 uW, 37.34 MHz Transmission Gate Based 4-Bit ALU for Contemporary Low-powered, High-Speed Microprocessors

This work explores the 4-bit Arithmetic Logic Unit (ALU), a pivotal component in digital computers. A comprehensive assessment of its design, functionality, and performance is conducted. Special attention is given to architectural factors, particularly logic gates and adders, crucial in the creation of a 4-bit ALU. The research encompasses the use of four different logic techniques, namely CMOS, dynamic, pseudo NMOS, and transmission gate, within the system. Comparative analysis reveals that the transmission gate yields the most favorable outcomes, for instance slew rate of 173.24 GV/s and propagation delay of 27.27 ps on average. Our proposed ALU design has achieved a staggering <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2.319\ μ W</tex> static power and a silicon area of 537 um 2 . Our proposed ALU is proven to be best for the popular Arm Cortex A7, a low powered microprocessor, whose total power dissipation is less than <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">100\ μ W</tex> .