We propose a novel, custom frame synchronization architecture aimed at easy deployment on any hardware platform. Frame synchronization is the process of discerning valid data frames from an incoming transmission and in this article it is accomplished by attaching distinctive binary overhead sequences on the frames. These sequences act as markers for the frames and enable their capture. They have certain properties and can be detected by using only simple hardware constructs like XNOR gates and few-bit adders. A low-cost commercial FPGA was used for implementation (NEXYS 4 DDR).
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Dimitris Nikolaidis (2024) studied this question.
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