Design and Implementation of a Digital Matched Filter for Square Pulses Signals using FPGA

In this paper, we discuss a practical mechanism of digital matched filtering which maximizes of output SNR for square, triangular , Gaussian pulse signals and other pulse signals in presence of additive white Gaussian noise (AWGN) by using a digital matched filter (DMF) corresponding to time domain convolution algorithm of input and reference signals using Cyclone II EP2C70F896C6 FPGA from ALTERA placed on education and development board DE2-70 with the following parameters: sampling frequency MHz F sam 50  , pulse width s S   6  , pulse period s T  12  , samples number (length of reference signal) is 300, the ratios of signal to the noise at the input of the filter is 1/8 , 3 / 1 , 2 / 1 , 1 / 1  INP SNR , processing gain factor is 25dB.The results of filter operation are evaluated using a digital oscilloscope to display the input and output signals for different INP SNR .