NEST: A Quadruple-Node Upset Recovery Latch Design and Algorithm-Based Recovery Optimization

Multi-node upset induced by radiation on integrated circuits has caused many circuit reliability issues. This paper proposes a single-event quadruple-node upset recovery latch (NEST), based on 4 circular feedback loops that are formed by 25 C-elements to realize high robustness. NEST achieves 29.02% reduction in power consumption compared to the LDAVPM latch and 51.44% reduction in setup time compared to the QRHIL latch. NEST also achieves a 99.29% quadruple-node upset recovery rate. Furthermore, a high-speed, high-precision optimization algorithm for multi-node upset recovery is also proposed and implemented. This algorithm achieves 99.84% reduction in simulation time for exhaustive fault injections having equivalent accuracy with HSPICE.