Improvement of Nldmos Performance in Low-Resistivity Substrate for Integration with Discrete Power Devices on One Chip

Discrete power device is usually manufactured separately from logic devices due to the limitation of utilizing low-resistivity substrates. This paper presents an NLDMOS capable of being manufactured together with discrete devices on one chip based on TCAD simulation. The NLDMOS is designed in heavily doped N-type epi and isolated by a wide PBL which is picked up using a deep P-well in body region. The performance of the NLDMOS is enhanced by optimizing the ion implantation at its drain region: N+ is shifted 0.3um away from the edge of STI to increase the on-state breakdown voltage; a RESULF boron region is deeply implanted at the bottom of N-drift region to increase the off-state breakdown voltage. Therefore, a high on-BV and off-BV NLDMOS is achieved in a low-resistivity substrate, which could be further integrated with discrete devices on one chip.