Analysis of Hyper-Threading Technology Using On-Die Performance Monitoring Counters

Performance Monitoring Counters (PMC) are hardware counters present in cores of the Central Process Unit. There are two types of counters, 1. Fixed counters and 2. Programmable Counters. Fixed Counters counts total instructions retired, unhalted logical processors in terms of reference clock and core clocks. Programmable Counters are time multiplexed to most of the IPs incorporated in the SoC. Top Down Microarchitecture technique (TMA) is implemented for quick and easy analysis of the performance of the System on Chip (SoC). The combination of TMA and PMC has been used for workloads characterization, finding the perfromance bottlenecks and understanding the microarchitecture of Cores and SoC. The paper additionally monitors the metrics, in particular the Frontend Bound, Backend Bound, DRAM bounds and Core Bounds, Bad speculation, and instruction retirements. This paper has taken Hyperthreading technology as an instance to analyse the performance using the combination.