What question did this study set out to answer?

To investigate performance limiting mechanisms in NVIDIA CMP 170HX's Tensor Cores using microbenchmarking methods.

March 15, 2026Open Access

Microbenchmarking Instruction-Level Tensor Core Throttling in NVIDIA CMP 170HX

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To investigate performance limiting mechanisms in NVIDIA CMP 170HX's Tensor Cores using microbenchmarking methods.
Microbenchmarking methods employed to assess instruction-level performance.
Experiments explored Instruction Level Parallelism (ILP) scaling and warp scaling.
Dependency chain construction and cross-pipeline interference analyzed.
Identified a 256 fixed-cycle instruction execution throttling in Tensor Cores.
Found that Tensor Core computing power is limited to 1/32 of its theoretical peak.
Established a theoretical model linking microarchitecture to measured computing power of 6.3 TFLOPS.

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Microbenchmarking uncovers latency and hardware gating limitations in NVIDIA CMP 170HX's Tensor Cores, indicating reduced computing power.

Kangwei Xing (2023) studied this question.

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Microbenchmarking uncovers latency and hardware gating limitations in NVIDIA CMP 170HX's Tensor Cores, indicating reduced computing power.