A device to circuit reliability framework is used to analyze the impact of Bias Temperature Instability (BTI) and Hot Carrier Degradation (HCD). The framework consists of BTI Analysis Tool (BAT) and Hot Carrier Analysis Tool (HCAT) at device level, and Circuit Aging Reliability Analysis Tool (CARAT), that uses BAT and HCAT, at circuit level. CARAT performs cycle-by-cycle simulations with calibrated PMOS and NMOS models. Inverter-based Ring Oscillator (RO) is used to link the threshold voltage degradation (Δ VT) of each transistor due to BTI and HCD to RO frequency degradation (% Δ f / f₀). Various logic gates (XOR implemented with NAND and NOR) under random data-path activity are used to showcase the usefulness of cycle-by-cycle simulation by this framework.
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Chatterjee et al. (2024) studied this question.
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