Impact of Co-Integration on the Performance of Full CMOS Based Hybrid SET-FET Circuits for Scalable Quantum Computing using FinFET Technologies

The presented work investigates the use of quantum conduction mode in FinFETs as a replacement to Single Electron Transistor (SET) in hybrid SET-FET circuit. Results show that the smaller operating bias range of FinFETs during quantum operation, in the subthreshold regime, could be considered as a technology limitation to replace SETs. optimizing FinFET geometry by using number of fins/fingers and selecting right threshold voltage devices can mitigate this issue, making FinFETs as an attractive choice for co-integration in quantum computing applications.