Memory-Efficient Multiplier-Less 2-D DWT Design Using Combined Convolution and Lifting Schemes for Wireless Visual Sensors

In this article, the combined convolution–lifting scheme is explored to address the design issues of 2-D discrete wavelet transform (DWT) structures. We found that the combined convolution–lifting scheme of type-1 (convolution followed by lifting) is more suitable than convolution or lifting schemes to design 2-D DWT structures with less on-chip memory. Furthermore, the canonic signed digit (CSD)-based multiplier-less designs are presented for convolution-DWT and lifting-DWT using <tex-math notation="LaTeX">$9/7$ </tex-math> biorthogonal filters, and they have identical resource requirements for 12-bit coefficients. The proposed multiplier-less designs of convolution-DWT and lifting-DWT are used to derive a 2-D DWT structure to take advantage of the combined convolution–lifting scheme. The comparison result shows that the proposed combined 2-D DWT structure involves <tex-math notation="LaTeX">24× </tex-math> less area-delay-product (ADP) and <tex-math notation="LaTeX">17× </tex-math> less energy per image (EPI) compared with the best of the existing fractional wavelet transform (FrWT)-based structure and provides reconstructed images of 14 dB higher peak signal-to-noise ratio (PSNR). Compared with the recently proposed approximate lifting (ALF) 2-D DWT structure, the proposed combined 2-D DWT structure involves <tex-math notation="LaTeX">4.5× </tex-math> less ADP, <tex-math notation="LaTeX">2.2× </tex-math> less EPI, less on-chip memory by <tex-math notation="LaTeX">$4N$ </tex-math> words and provides reconstructed images of PSNR higher by 7 dB, where <tex-math notation="LaTeX">N </tex-math> is the image width or height. Therefore, the proposed combined 2-D DWT structure is a better alternative to the existing 2-D DWT structures for low-complexity and low-memory realization of 2-D DWT especially for the visual sensor node applications.