A 6-bit absolute value detector based on MOSFET and PTL structure

As science and technology develop fast, people nowadays can have an easy approach to various advanced products. The use of Internet of Things has become a reality. To ensure its reliable implementation in daily life, stable and efficient hardware equipment like sensor is essential, where absolute value detector is widely used. A detector is created on the basis of this. The circuit can compare a signed 6-bit number with the threshold of a 5-bit number. This design uses MOS and pass-transistor logic (PLT) structure as the basic parts to form the transcoding logic and the subtraction logic. This paper also discusses the optimization of its minimum latency and energy usage based on logic effort parameters. In order to match a sequence of minimum delays, the article gives various power supply voltages and calculates each schemes lowest energy consumption for each voltage. The reduction of the energy cost is significant, which means the circuit has application value in reality. Besides, the different results are listed in a scatterplot to find out the trend of optimization, which may be helpful for selecting a proper scheme in the real program.