14.10 34.7A/mm² Scalable Distributed All-Digital 6×6 Dot-LDOs Featuring Freely Linkable Current-Sharing Network: A Fine-Grained On-Chip Power Delivery Solution in 28nm CMOS

As modern SoCs become more power-intensive, the distributed LDO architecture is emerging as a solution for on-chip power delivery [1] –[6]. Multiple digital LDO (D-LDO) units cooperate inside this framework to regulate supply voltage via a shared power grid network. By evenly dispersing the load current among the D-LDO units, this point-of-load regulation helps considerably in both reducing thermal intensity and mitigating the IR drop brought on by parasitic resistance (R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> ) within the power grid. In line with this technical direction, as shown at the top of Fig. 14.10.1, a finer-grained distribution, leveraging a greater number of smaller current-capacity D-LDOs, may be a more desirable way to ease the thermal budget and further minimize R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> attributed to the shorter distances between D-LDOs. However, a smaller R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> leads to higher sensitivity to the disparate nonideal offset voltages (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</inf> ) of each D-LDO unit, thereby deteriorating the current-sharing balance between the D-LDOs [1]. The current (I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RG</inf> ) flowing via R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> should ideally be zero, but it can increase in reality due to inevitable V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</inf> and R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> . This will likely cause some D-LDOs to turn off, leaving only a few D-LDOs to supply the majority of the load current [2], potentially inducing local hotspots and losing the benefits of the distributed LDO framework. Previous distributed LDO systems [2] –[4] lack a function to correct the current-sharing imbalance, and their stability relies on a large R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> , which impedes the finer distribution of D-LDOs. To indirectly balance the LDO currents, earlier works [1], [5] attempted to calibrate the LDO voltages by utilizing a global controller that coordinates all the D-LDO units. In addition to their high complexity in interconnections and poor current-sharing accuracy, these systems are likely to suffer from low reusability when it comes to redesigning the distributed LDO configuration, thus limiting scalability. An approach in [6] demonstrated a daisy-chained method, but its analog-based solution therefore not compatible with a fully digital design.