NDSTRNG: Non-Deterministic Sampling-Based True Random Number Generator on SoC FPGA Systems

Random number generation is essential for applications in simulation, numerical analysis, and data encryption. The ubiquitous presence of system-on-chip (SoC) field-programmable gate array (FPGA) embedded devices in critical sectors necessitates robust random number generators (RNGs) that operate within these specialized environments. Traditional RNGs in GNU/Linux systems derive entropy from peripheral hardware events, which are scarce in SoC FPGA platforms lacking standard PC peripherals. Addressing this challenge, this paper proposes a novel random number generator named NDSTRNG that leverages the unique hardware structure of the SoC FPGA and the inherent randomness of GNU/Linux. The proposed generator employs a non-deterministic sampling model to circumvent reliance on various peripherals while ensuring unbiased output via a linear feedback shift register (LFSR)-based post-processing method. We implement this random number generator in SoC FPGA GNU/Linux using minimal FPGA resources and only one Linux task for sampling. NDSTRNG achieved a throughput exceeding 700 Kbps. Moreover, the entropy source of the generator is evaluated using NIST SP 800-90B, while the quality of the generated random numbers is assessed through ENT, NIST SP 800-22, and DIEHARDER. The results confirm that NDSTRNG meets the stringent criteria for both high-quality and high-speed random number generation, making it suitable for deployment in communication, defense, and medical domains where reliable RNGs are indispensable.