Realizing High Stability of Threshold Voltage in NiO/β-Ga₂O₃ Heterojunction-Gate FET Operating up to 200 °C by Electrothermal Aging Technology

We proposed an electrothermal aging (ETA) technology to improve stability of threshold voltage ( <tex-math notation="LaTeX">V TH </tex-math> ) in fabricated NiO/ <tex-math notation="LaTeX">β </tex-math> -Ga2O3 heterojunction-gate FET (HJ-FET). Firstly, the HJ-FET is treated by ETA with a gate stress ( <tex-math notation="LaTeX">V G,Str </tex-math> ) of −8 V and a thermal stress rising to 60 °C. An interface dipole ionization model is proposed to explain the ETA mechanism. The two kinds of interface dipoles are permanently ionized under electrothermal stress, leading to a thinned space charge region (SCR) as well as the reduced recombination centers concentrations at heterojunction (HJ) interface, which is responsible for the negative and positive shift of the <tex-math notation="LaTeX">I </tex-math> – <tex-math notation="LaTeX">V </tex-math> curves for the HJ-FET and HJ-diode under gate negatively biased, respectively. Secondly, the device treated by ETA is placed for 100 days without stresses at room temperature (ETA + 100D), the forward electrical properties of the devices remain almost unchanged with the gate stress time, and fully consistent with the performance of the device with just completed ETA treatment, proving the credibility of the ETA method to improve stability. Thirdly, the reliability of the device was assessed by negative bias temperature instability (NBTI) and was found to be greatly enhanced. Significantly, at 40 °C, the shift ratio of <tex-math notation="LaTeX">V TH </tex-math> decreases greatly to 0.4% after ETA + 100D from 31% before ETA. Furthermore, the device exhibits high stability with an extremely low <tex-math notation="LaTeX">V TH </tex-math> shift ratio of 2.4% even up to 200 °C. Our work demonstrates the great potential of <tex-math notation="LaTeX">β </tex-math> -Ga2O3 HJ devices after ETA for a stable operation in extreme environments.