Additive Manufacturing of Interposers with Curved Vias

Additive manufacturing by digital light processing (DLP) has advanced rapidly, and micro-printers are now commercially available that use lens systems to expose arrays of 1920 x 1080 pixels of 2 μm x 2 μm size with ultraviolet (UV) light, while higher resolution printers with even smaller pixels are in development. Selective polymerization by localized UV curing on this scale enables microfabrication of features around 10 μm, while offering print rates sufficient for parts on the order of centimeters. In addition to UV curable polymers, ceramics can be additively manufactured by DLP, either by curing suspensions of ceramic particles or preceramic polymers. We present a novel interposer fabrication process based on additive manufacturing, whereby interposers can be created with near arbitrary routing of electrical signals. We first present the method to create a ceramic dielectric using micro stereolithography of a preceramic resin slurry. Then we explore the use of solder alloys with high capillary action to fill vias with aspect ratios greater than 100:1 by melt infiltration. Finally, we present two interposer demonstrations relevant to imaging applications, including ceramic interposers containing arrays of vias with diameters and pitches as small as 9 μm and 18 μm, respectively and sizes up to 2 cm x 2 cm x 0.7 cm. After melt infiltration of the vias with a copper indium solder, via resistivities as low as ~4 x 10-8 Ω·m were measured, close to 2X the international annealed copper standard. With our novel approach, we demonstrated two different interposer designs: 1) a curved interposer intended to connect a curved infrared detector with a planar read-out integrated circuit (ROIC); and 2) a fan-out interposer that spreads the pitch of an array of vias from 60 μm to 220 μm. These interposers require thousands of curved and angled vias, respectively, that cannot be realized using conventional microelectronics processing approaches. The unprecedented via routing enabled by this additive technology offers new packaging options for the 3D integration of microelectronic subsystems beyond imaging applications.