This article summarizes advances in material removal mechanisms during chemical mechanical polishing in integrated circuits, suggesting improved efficiencies.
This article systematically summarizes the research progress on chemical mechanical polishing of shallow trench isolation (STI), inter level dielectric (ILD) and metal layers in the process of integrated circuit fabrication. In the shallow trench isolation (STI) CMP processes, the materials removal rate is relative to the Ce³⁺ concentrations on the surface of cerium oxide, the higher Ce³⁺ concentration leads to the higher polishing efficiencies. In the chemical mechanical polishing of dielectric materials, Cook’s elastic contact theory offers a well-substantiated explanation for the material removal mechanism. During the chemical mechanical polishing process of metal thin films, the material removal mechanism involves the oxidation of the metal surface to form the corresponding oxide, followed by mechanical abrasion to remove the material.
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Fan et al. (2026) studied this question.
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