Technology Computer‐Aided Design Analysis of the Impact of Impurities and Traps in the AlGaN Barrier of GaN HEMTs on the C–V Characteristics of Metal–Insulator–Semiconductor Structures

The interface of the AlGaN barrier and the traps and impurities within the barrier significantly affect the characteristics of GaN devices. One evaluation method is C–V measurement using a metal–insulator–semiconductor structure with a gate insulator, gate electrode, and drain electrode, where the waveform changes due to the influence of traps in the gate insulator, AlGaN barrier, and their interface. In this study, we incorporated impurities in the AlGaN barrier obtained from secondary ion mass spectrometry analysis and electron/hole traps estimated from C–V waveforms into a Technology Computer‐Aided Design model to reproduce the measured C–V characteristics and analyze the underlying mechanisms. It was found that the reduction in maximum capacitance is caused by electron traps at the gate insulator/AlGaN interface and silicon in the AlGaN barrier, and that the difference in hysteresis curves observed during two consecutive gate voltage sweeps can be reproduced by introducing two types of electron traps with different energy levels at the interface.