Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application

In this paper, we present a comprehensive experimental characterization of electron and hole effective mobility (/spl mu//sub eff/) of ultrathin SOI n- and p-MOSFETs. Measurements have been performed at different temperatures using a special test structure able to circumvent parasitic resistance effects. Our results indicate that, at large inversion densities (N/sub inv/), the mobility of ultrathin SOI transistors is largely insensitive to silicon thickness (T/sub SI/) and is larger than in heavily doped bulk MOS because of a lower effective field. At small N/sub inv/, instead, mobility of SOI transistors exhibits a systematic reduction with decreasing T/sub SI/. The possible explanation for this /spl mu//sub eff/ degradation in extremely thin silicon layers is discussed by means of a comparison to previously published experimental data and theoretical calculations. Our analysis suggests a significant role is played by an enhancement of phonon scattering due to carrier confinement in the thinnest semiconductor films. The experimental mobility data have then been used to study the possible implications for ultrashort SOI transistor performance using numerical simulations.