Key result
A 0.18-μm CMOS multirate filter bank ASIC for real-time biomedical signal analysis achieved a maximum throughput of 100 Kbps and consumed 2.58 μW at 1.8 V.
The paper presents a low-power CMOS ASIC design for real-time multirate signal decomposition of biomedical signals.
Low-power ASIC design supports portable biomedical monitoring development; leaves open clinical validation and integration.
A CMOS low-power application specific integrated circuits (ASIC) design on a compact support filter bank is presented in this paper. The ASIC chip can be used for multirate signal decomposition and analysis of various biomedical signals in real-time. The design is implemented and fabricated using 0.18-μm CMOS technology. The processing speed is reconfigurable with maximum throughput up to 100 Kbps. The chip consumes power dissipation of 2.58 μW at a supply voltage of 1.8 V with a clock frequency of 1 kHz.
No takes yet. Share an insight, caveat, or question.
Wai et al. (2007) studied this question. 0.18-μm CMOS multirate filter bank ASIC was evaluated on Processing speed and power dissipation. A 0.18-μm CMOS multirate filter bank ASIC for real-time biomedical signal analysis achieved a maximum throughput of 100 Kbps and consumed 2.58 μW at 1.8 V.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: