Suppression of hot-carrier effects in submicrometer CMOS technology

Approaches used to suppress the hot-carrier effects in submicrometer CMOS technology based on the drain engineering of the device structure and process-induced deice degradation are discussed. Different types of lightly doped drain (LDD) structures are studied. Several process-related device aging issues are discussed. Twin-Tub V CMOS technology is used as an example of how to manage the hot-carrier issues with respect to the process integration aspects.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>