The design of a low-voltage low-power fourth-order single-bit continuous-time Delta-Sigma modulator is presented in this paper for audio applications. The modulator employs an input-feedforward topology in order to reduce internal signal swings, thus relaxes the linearity and slew rate requirements on amplifiers leading to low-voltage operation and low-power consumption. The energy efficiency is further improved by embedding the summation of feedforward paths into the quantizer. For low-voltage operation, a gain-enhanced fully-differential amplifier and a body-driven rail-to-rail input CMFB circuit are developed. The modulator, implemented in a 0.13- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">μm</tex> </formula> standard CMOS technology with a core area of 0.11 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">mm²</tex></formula> , achieves an 82-dB dynamic range (DR), and a 79.1-dB peak signal-to-noise and distortion ratio (SNDR) over a 20-kHz signal bandwidth. The power consumption of the modulator is 28.6 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX"></tex> </formula> under a 0.6-V supply voltage. The achieved performance make it one of the best among state-of-the-art sub-1-V modulators in terms of two widely used figures of merit.
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Zhang et al. (2011) studied this question.
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