Answers are grounded in this paper and cite their sources.
The authors describe a LISP microprocessor which includes over 550 K transistors, has 114 K of on-chip RAM, and runs instructions in a single 30-ns clock cycle. The chip is implemented in 1.25-/spl mu/m double-level-metal (DLM) CMOS, has 224 pins, and is packaged in a custom pin-grid array. The microinstruction and macroinstruction sets of this chip are compatible with an existing LISP processor. An extensive discussion of test features designed into the processor chip is given.
No takes yet. Share an insight, caveat, or question.
Bosshart et al. (1987) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: