Compares electro-thermal characteristics of p-GaN gate HEMTs, suggesting gate-contact schemes affect reliability.
p-GaN gate enhancement-mode GaN High Electron Mobility Transistors (HEMTs) are promising normally off power devices, but their high-temperature reliability is strongly affected by the gate-contact scheme. This study compares Pd ohmic and Ni Schottky p-GaN gate HEMTs fabricated on the same GaN-on-Si epitaxial platform by combining temperature-dependent electrical characterization, post-temperature-dependent-test (TDT) room-temperature recovery analysis, and thermoreflectance thermal mapping. Electrical measurements were performed in a temperature range from room temperature to 500 °C using gate leakage, transfer, and output characteristics, while thermal maps were obtained before and after the TDT under identical bias conditions. The Pd ohmic devices exhibited a higher initial current drive but a larger operating gate-current penalty and greater degradation of normalized on-state characteristics at elevated temperature. After the TDT, reduced transconductance and maximum drain current were accompanied by weaker active-channel heating, indicating degradation-type cooling associated with reduced gate–channel modulation efficiency. In contrast, the Ni Schottky devices showed a lower gate-current penalty and better normalized output retention up to approximately 300 °C; however, post-TDT increases in transconductance and drain current occurred together with degraded subthreshold swing and persistent localized heating, indicating apparent on-state activation with weakened gate/depletion control. These results show that p-GaN gate reliability should be assessed through coupled electrical and thermal signatures rather than single electrical or thermal metrics.
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Kim et al. (2026) studied this question.
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