Hybrid Ripple Carry Adders with gate-level optimizations for energy-efficient approximate computing: A conceptual framework for pixel-level image inversion

Approximate computing is an effective approach for improving energy efficiency in error-tolerant applications such as image processing. In this work, two hybrid ripple-carry adder architectures (HRCA1 and HRCA2) are proposed for image inversion, where approximation is selectively applied to the least significant bits while preserving accuracy in the most significant bits. This design strategy enables significant reductions in power, delay, and area while maintaining high perceptual quality. The HRCA1 configurations achieve up to 48.3% reduction in power, 40.7% reduction in delay, and 40.7% reduction in area compared to the conventional ripple-carry adder. In contrast, HRCA2 provides a better trade-off between hardware efficiency and computational accuracy. Notably, a configuration based on the AFA_d2 adder achieves negligible reconstruction error (MSE = 0) and perfect structural similarity (SSIM = 1), resulting in ideal image reconstruction quality, demonstrating visually lossless image reconstruction. Compared to existing approximate adders such as RELOA, the proposed HRCA architectures achieve superior performance in both hardware and image quality metrics, making them suitable for energy-efficient image processing applications.