Randomized trial demonstrates a CMOS-compatible ternary interface, suggesting improved digital regeneration.
This brief presents a clocked CMOS ternary input/output cell with one-hot internal regeneration and reference-restored output (OH-TC). Ternary voltages are used at the cell boundary, where 0, the middle reference (VMID), and VDD represent the external symbols. Internally, the boundary symbol is detected, regenerated as one-hot CMOS rails, stored through a clocked path, and restored to a ternary boundary for the next stage. The objective is a CMOS-compatible registered ternary interface, not a new physical transistor or an unclocked ternary wire family. SKY130/ngspice pre-layout evidence includes storage/pipeline checks, reset/startup validation, registered 2-, 4-, 8-, and 16-stage cascades, VMID sensitivity at 0.85 V, 0.90 V, and 0.95 V, representative tt/ss/ff corner completion, 9/9 typical-typical (TT) process-voltage-temperature checks, detector-region characterization, supply-current-derived energy estimates, useful boundary/decoder demonstrations, and contextual CMOS baselines. The results support OH-TC as a registered ternary boundary cell whose internal state is regenerated digitally rather than propagated as a long-term analog middle level.
No takes yet. Share an insight, caveat, or question.
Kiran Thandapani (2026) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: