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The aim is to develop a power-efficient ternary SRAM cell for enhanced energy efficiency and information density.

June 13, 2026Scientific ReportsOpen Access

A low-power buffer-assisted 14T ternary SRAM

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The aim is to develop a power-efficient ternary SRAM cell for enhanced energy efficiency and information density.
Designed a 14-transistor CNTFET-based SRAM cell using a buffer-based topology.
Conducted HSPICE simulations with the Stanford CNTFET compact model to evaluate performance.
Integrated the TSRAM into a ternary medical image processing framework utilizing a weighted k-nearest neighbor classifier.
Achieved a power–delay product of 5.37 aJ at 0.9 V, the lowest compared to other TSRAM cells.
Demonstrated a 26.65% reduction in average energy consumption and a peak signal-to-noise ratio of 41.06 dB.
Confirmed a 61.58% improvement over existing designs, supporting the use of this architecture in energy-efficient biomedical systems.

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Randomized trial shows improved energy efficiency in biomedical imaging systems, indicating significant benefits for low-power applications.

Haq et al. (2026) studied this question.

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Randomized trial shows improved energy efficiency in biomedical imaging systems, indicating significant benefits for low-power applications.