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Gate oxide scaling is essential for enhancing the performance of amorphous oxide semiconductor (AOS) field-effect transistors, yet it remains limited by charge trapping and interface quality. In this work, we demonstrate tungsten-doped In2O3indium–tungsten oxide (IWO) MOSFETs incorporating an amorphous HfO2/ZrO2/HfO2(HZH) trilayer gate dielectric that achieves an equivalent oxide thickness (EOT) as low as3~0x00C5. The transistors exhibit near-ideal subthreshold swing (SS) (75 mV/decade), highon-state current (> 240~μA/μm), and suppressed gate leakage even at this extreme limit of EOT scaling. Positive bias-stress (PBS) tests reveal improved reliability in HZH compared with conventional HfO2, with minimal threshold voltage shift. Through density-gradient-based numerical modeling and analytical stress-recovery simulations, we show that these improvements originate from spatial and energetic redistribution of oxygen vacancy induced traps into the ZrO2-rich region, away from the channel interface. The consequent reduction in the density of acceptor-like subgap states collectively improves carrier mobility and mitigates trap-limited conduction (TLC). These results highlight the potential of targeted gate-stack engineering in extending conventional EOT scaling benefits to AOS transistors.
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Park et al. (2025) studied this question.
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