A CMOS Medium Power Amplifier With Built-In Power Detector for Multistandard Dedicated Short-Range Communication Applications

This is the authors' abstract. We don't add key points for this paper.

This letter presents a 5.8-GHz medium power amplifier (PA) using 0.18-μm CMOS technology with a built-in power detector for triple-mode operations, including amplitude-shift keying (ASK), frequency-shift keying (FSK), π/4-quadrature-phase shift keying, and multilevel complex modulations, for multistandard dedicated short-range communication applications. For ASK/FSK operations, the PA can work in nonlinear regions owing to the constant envelope feature of input signals that improve the power added efficiency, by which ASK modulation is achieved by modulating the bias of the PA output stage. The measured results show more than 10-dBm output power for all mode operations, with a chip area of 0.92 × 0.75 mm2.