Impact of Saturated Spontaneous Polarization on the Memory Window and Endurance of Hafnium-Based Si Channel FeFET

In this work, we investigate the impact of saturated spontaneous polarization (PS) of the ferroelectric layer on the memory window (MW) and the endurance of hafnium-based Si channel ferroelectric field-effect transistors (FeFETs). We tunePSwithin the range of 3.85–18.31 μC/cm2by varying the proportions of hafnium (Hf) and zirconium (Zr). The results show that the MW and endurance of the FeFETs initially increase and then decrease with the decrease ofPS. We find that the lower limit ofPSis about 8 μC/cm2due to the rapid increase in trapped charge (Qt). To clarify the underlying mechanism of the rise inQt, we model the threshold voltage (Vth) by considering charge trapping in the FeFET gate-stack. The simulation results show that defect energy levels exist near the Fermi level of the Si substrate under flat band conditions and are capable of capturing electrons and holes during write operation, which deteriorates the MW in FeFETs even at smallerPS. Furthermore, the generation of deep energy level defects contributes to a greater charge trapping, which degrades the endurance. Our findings highlight that the passivation of deep-level defects is a crucial strategy for improving the endurance of FeFETs.