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An analytic electrical model for accurate capacitance-voltage (C-V) characterization of high- gate dielectrics using a mercury probe is presented. This approach considers the series association of the dielectric/substrate impedance, the circuit series resistance, and an additional impedance modeling the interfacial layer between the oxide and the mercury-drop contact. This model is useful to describe the frequency behavior of C-V measurements in a wide range of frequencies (500 Hz to 100 kHz). The extraction procedure of model parameters is described and the method is successfully applied to high- k layers deposited on silicon with equivalent oxide thickness down to 1.2 nm.
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Garros et al. (2002) studied this question.
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