A 70-MS/s 110-mW 8-b CMOS folding and interpolating A/D converter

A CMOS analog to digital converter based on the folding and interpolating technique is presented. This technique is successfully applied in bipolar A/D converters and now also becomes available in CMOS technology. The analog bandwidth of the A/D converter is increased by using a transresistance amplifier at the outputs of the folding amplifiers and, due to careful circuit design, the comparators need no offset compensation. The result is a small area (0.7 mm/sup 2/ in 0.8 /spl mu/m CMOS), high speed (70 MS/s), and low-power (110 mW at 5 V supply, including reference ladder) A/D converter. A 3.3 V supply version of the circuit runs at 45 MS/s and dissipates 45 mW.