Why the study?
To design a robust low-power ECG pre-processor that uses window-based design to consume less power and resources of an FPGA.
The proposed symmetric Bartlett window design for ECG pre-processing offers low power consumption and efficient resource utilization suitable for wearable biomedical equipment.
May enable low-power wearable ECG monitoring; leaves open clinical validation of diagnostic utility.
A robust low power Electrocardiogram (ECG) pre-processor is proposed to extract the useful information from biomedical signal. The methodology uses window-based efficient design that consumes less power and resources of Field Programmable Gate Array (FPGA). The comparison has been done among different window functions and filter architectures (Symmetric and Anti-symmetric). The entire hardware implementation is carried out on ZedBoard Zynq-7000 FPGA board. The inference has been drawn that symmetric Bartlett window consumes only 0.88%, 5.13%, and 9% of LUTs, slice registers and DSPs units respectively. 35mW of dynamic and 105 mW of static power is consumed by the pre-processor module. The proposed design is recommended to find applications in wearable and portable biomedical equipments.
No takes yet. Share an insight, caveat, or question.
Tripathi et al. (2020) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: