January 1, 2013Electronics LettersOpen Access

VLSI implementation of low‐power cost‐efficient lossless ECG encoder design for wireless healthcare monitoring application

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Population

MIT-BIH Arrhythmia Database

Comparison

VLSI architecture of a lossless ECG encoding… vs Previous low-complexity and high performance…

Authors

SCShilin ChenShenzhen University JWJu WangMedizinische Hochschule Hannover

Discussion

Member takes

Implication

May advance low-power wearable ECG monitoring; leaves open clinical validation and integration.

Structured PICO

Population

MIT-BIH Arrhythmia Database

Intervention

VLSI architecture of a lossless ECG encoding circuit with adaptive rending predictor and two-stage entropy encoder

Comparator

Previous low-complexity and high performance techniques

Outcome

Data compression rate, hardware cost, and power consumption

The proposed VLSI architecture for lossless ECG encoding achieves lower hardware cost, lower power consumption, and a better compression rate than existing designs, making it suitable for wireless healthcare monitoring.

Cite This Study

Chen et al. (2013) studied this question.

synapsesocial.com/papers/6a758f481078cf7de2b22edc https://doi.org/10.1049/el.2012.3505

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VLSI implementation of low‐power cost‐efficient lossless ECG encoder design for wireless healthcare monitoring application

Discussion

Member takes

Implication

Structured PICO

Cite This Study

VLSI implementation of low‐power cost‐efficient lossless ECG encoder design for wireless healthcare monitoring application

Discussion

Member takes

Implication

Structured PICO

Cite This Study

Also Consider

Also Consider