This paper discusses the integration of a highly scalable and interfacial switching, multi-bit Ti/Al 2 O 3 /NbOx/Ti bi-layer memristor stack in the 3 × 3 passive crossbar array. In conjunction with wire resistance, impact and methodologies are discussed to enhance voltage delivery for effective two-bit vector matrix multiplication. Finally, parameter tuning strategies for dynamic program and erase of the cells by pulsed V DD /2 and V DD /3 schemes to realize multi-bit vector matrix multiplication are presented.
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