An array of 90times90 active pixel sensors (APS) with pixel-level embedded differencing and comparison is presented. The nMOS-only 6T 2C 25 mum times 25 mum pixel provides both analog readout of pixel intensity and a digital flag indicating temporal change at variable thresholds. Computation is performed through a pixel-level capacitively coupled comparator which also functions as analog-to-digital converter. The chip, fabricated in a 0.5 mum 3M2P CMOS, process consumes 4.2 mW of power while operating at 30 fps. Change sensitivity is 2.1% at an illumination of 1.7 W/cm2. Gating of raster-scanned pixel output by change detection typically produces a 20-fold compression in the data stream, depending on image conditions and reconstruction quality set by the change detection threshold.
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M. et al. (2007) studied this question.
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