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The structure and principles of a new nonvolatile charge storage device are described. The Floating Si-gate Channel Corner Avalanche Transition (FCAT) memory device is an n-channel MOS transistor with a floating gate. The p+regions are placed outside the channel area by aligning them with the floating gate and are adjacent to the diffused n+source and/or drain regions. This device can operate in the write/erase modes under low-voltage (12 V) and high-speed (< 1 ms) conditions using only a pair of positive pulses. This is achieved with a novel avalanche transition at the channel corner through a relatively thin (4-6 nm thick) oxide under the open-drain condition.
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Horiuchi et al. (1979) studied this question.
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