A 64 Gb/s/pin Single-Ended PAM-4 Transmitter With a Merged Preemphasis Capacitive-Peaking Crosstalk Cancellation Scheme for Memory Interfaces in 28-nm CMOS

A 64 Gb/s/pin single-ended four-level pulse amplitude modulation (PAM-4) transmitter (TX) incorporating a merged preemphasis capacitive-peaking (C-peaking) crosstalk cancellation (XTC) scheme and a 3-tap reconfigurable fractional-spaced feed-forward equalizer (FS-FFE) is presented. The proposed XTC scheme mitigates the far-end crosstalk (FEXT) without attenuating the output swing while maintaining high TX’s bandwidth. The proposed FS-FFE provides a compensation range beyond Nyquist frequency, thereby reducing the switching jitter (SWJ) and extending the widths of PAM-4 eyes. The reconfigurable feed-forward equalizer (FFE) tap assignment scheme enables the TX to operate in a wider range of scenarios without additional power consumption. Besides, the FFE) coefficient selector in the predriver eliminates the need for additional driver cells typically required by FFE taps, reducing parasitic capacitance at the TX output and further improving the TX bandwidth by 60%. The measurement results show that the TX achieves an energy efficiency of 1.27 pJ/bit at 64 Gb/s with a total insertion loss of −11 dB and FEXT of −15.8 dB at 16 GHz. The proposed merged C-peaking XTC scheme decreases the crosstalk-induced jitter (CIJ) ratio by 82%.