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When using conventional high-temperature thermal oxidation processes to fabricate Si-based devices that include SiO 2 dielectrics, the SiO 2 /Si interface and bulk -oxide layer are formed at the same time . We have developed a new low-temperature process that separates interface formation , by plasma-assisted oxidation, from bulk-oxide deposition , by plasma-assisted chemical-vapor deposition (CVD) and thereby separately controls , and optimizes the respective electrical properties of the SiO 2 /Si interface, and the SiO 2 layer. This approach has been extended to multilayer oxide-nitride-oxide (ONO) dielectrics on Si substrates, and has also been successfully transferred to an integrated processing cluster tool that combines the new SiO 2 /Si oxidation/deposition process, with deposition of polycrystalline Si gate electrodes by a high-temperature, rapid thermal CVD process to form a stacked gate structure.
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Lucovsky et al. (1992) studied this question.
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