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This letter investigates the effect of repeated uniaxial mechanical stress on bias-induced degradation behavior in polycrystalline thin-film transistors (TFTs). After 100 000 iterations of channel-width-direction mechanical compression, serious threshold voltage degradation and an abnormal hump are observed. Simulation indicates that the strongest mechanical stress occurs at both sides of the channel edge, between the polycrystalline silicon and gate insulator. Since these stress points produce oxide traps in the gate insulator, the degradation of threshold voltage shift and parasitic current path can be attributed to electron trapping at these intense mechanical stress points. In addition, the degradation becomes serious with diminishing TFT size.
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Chen et al. (2016) studied this question.
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